Memory map

Internal SRAM is reachable from two buses at addresses 0x6F0000 apart: instructions are fetched through 0x403xxxxx, data is read and written through 0x3FCxxxxx. Same physical memory — so the two regions in esp32s3/linker.ld must not overlap once that offset is applied.

Region	Address	Also known as	Holds
iram	0x40378000 + 32K	phys 0x3FC88000	.text, literal pools
dram	0x3FC90000 + 256K	—	.rodata, .data, .bss
—	0x3FCD7E00	—	ROM's data starts; stay below
—	0x3FCE9710	—	ROM's stack, which we borrow